OBJECTIVES

plaCMOS aims to develop a photonic-plasmonic-electronic integration platform that will enable an unprecedented leap forward in the transmission capacity of datacenter networks. To achieve that, plaCMOS will pursue small-proximity wafer scale integration of novel ferroelectric-based plasmonic-photonic modulators, SiGe photodetectors and BiCMOS electronics in a super-fast, micrometer-scale optical engine capable of transmitting and receiving NRZ data at world’s fastest speed of 200 Gbit/s per optical channel. plaCMOS will rely on this breakthrough advancement, to demonstrate the scalability of thermally independent multi-transceiver chips paving the way for next generation Tbit/s transceivers in monolithic chips complying with industry standards and volume manufacturing resources while surpassing performance expectations. plaCMOS’s technology speed and scalability advantages will be validated in fully functional single- channel and multi-channel (CWDM-based and SDM-based) transceiver prototype assemblies, clearly addressing both technology roadmaps for future data centers, waiving the stringent requirements for high-port count front panels in switches and servers at the best cost/performance intersection. In the same context, plaCMOS will explore the application of its PIC platform in forward looking applications that can lead to more advanced reconfigurable transceivers. The overall objective of plaCMOS is illustrated in the following schematic.